The present invention relates generally to telephone networks, and more particularly to an interface between fiber optic transport media and a switching system designed for electrical signals.
As multimedia applications increase the demand for high-bandwidth, high-bit-rate communications, fiber optics technology is rapidly advancing to supply the capacity. A family of standards for optical fiber transmissions is known as the Synchronous Optical Network (SONET) standards. SONET was born as an extension to the DS1 hierarchy, which is a hierarchy of xe2x80x9celectricalxe2x80x9d as opposed to xe2x80x9copticalxe2x80x9d signals and consists of levels of signals formed by multiplexing lower level TDM (time division multiplex) signals.
The SONET standard establishes a multiplexing format for using any number of 51.84 Mbits/s signals as building blocks. An OC-3 (Optical Carrier, Level 3) is a 155.52 Mbits/s signal (3xc3x9751.84 Mbits/s), and its electrical signal counterpart is referred to as an STS-3 signal. The STS-1 signal carries a DS3 signal or a number of DS1 or other lower level signals. A SONET STS-3 signal can be created by concatenating three STS-1 signals. Each SONET STS-N electrical signal has a corresponding OC-N xe2x80x9coptical signalxe2x80x9d. The OC-N signals are created by converting the STS-N electrical signal to an optical signal.
Although optical switching techniques have been developed, telecom companies are eager to provide as much performance as possible from their existing infrastructure. Switching systems based on the DS1 electrical signal hierarchy are in place and continue to be used for signals carrying that type of signal. Essentially these switching systems use DS0 data, which is derived from the DS1 hierarchy. For example, a DS1 signal is comprised of 24 multiplexed DS0 voice channels. Thus, there is a demand for interfaces that will permit SONET signals to be switched through switching systems designed for the DS1 hierarchy of signals.
One aspect of the invention is a switching matrix interface of a delivery unit that receives network data on telecommunications media and that delivers the network data to a switching matrix. A bus interface is operable to extract inbound network data channels from network data subframes processed by other modules of the delivery unit and incoming to the switching matrix. After switching, the bus interface is operable to format outbound network data channels outgoing from the switching matrix into network data subframes for transport within the delivery unit. Each channel is contained in a channel word, and after the inbound network data channels are received by the bus interface, a path verification code generator inserts a path integrity bit into each channel word. The path integrity bits are transported in superframe, whereby for each of said inbound network data channels, a number of said path integrity bits in a number of said channel words form a path verification code unique to that channel. Next, a transmit buffer receives the inbound network data channels and provides timing for transporting them to the switching matrix. After switching, a receive buffer receives outbound network data channels from the switching matrix and provides timing for transporting them back to the bus interface. During transport from the receive buffer, an outbound path verification monitor compares each channel""s path integrity bits with a stored code for that channel. Errors are reported to a controller, which is operable to generate control subframes for further transport within-the delivery unit via the bus interface.
An advantage of the interface is its consistency with a xe2x80x9cbuilding blockxe2x80x9d approach to designing the delivery unit. Delivery unit functions are partitioned among application modules, of which the interface is one such module. A common transport format provides for transport between modules, of both network data and control data on the same buses. Each module has a common bus interface for handling transport to and from the buses. Each module also has a common controller for generating and interpreting control data.